The BrainStem® was designed to be flexible and powerful. Understanding some key concepts will help in your development and enjoyment of the BrainStem modules.
The host is typically a conventional computer or workstation. Supporting libraries are available for the following platforms:
The BrainStem modules, then, take care of lower-level control, much like the brain stem in a human. As discussed below, the BrainStem is designed to easily interface with sensors, servos, motors and other devices. It has the ability to run localized TEA programs, pass I/O straight to the host, and respond to inputs with reflexes, all simultaneously.
The link is an abstract connection between the software support libraries and the physical BrainStem modules. Most often this link is in the form of a serial connection. The software libraries deal with a stream abstraction in the aIO shared library and can therefore be switched between serial, TCP/IP, USB, BlueTooth or other protocol layers as they are supported. Custom stream types can easily be created for unique bandwidth or connectivity requirements.
The protocol across the link is in the form of packets. The packet protocol is managed by the aStem shared library which offers convenience routines for creating packets, obtaining packets from the link, managing heartbeats, and supporting a debug trace of link bytes.
Modules are the physical hardware of the BrainStem architecture. The GP modules offer 4 high-resolution servo outputs, 5 10-bit A/D channels, and 5 Digital I/O pins. The GP 2.0 module additionally offers infrared transmit / receive and onboard power regulation. The modules communicate with the host across the link. Modules also have a common bus interface that uses the 2-wire I2C protocol. They can communicate with one another or other devices at data rates of 100K, 400K, and 1Mbit-per-second.
Future modules with varying I/O capabilities are always in the works allowing for a scalable, distributed I/O subsystem. Since I2C is an industry standard, the BrainStem modules can communicate with other devices including sensors, LCD displays, clock chips, memory devices...
The design of the BrainStem architecture allows the modules to be implemented with any microcontroller that can support I2C communication. This includes future devices that may have higher speed and additional I/O features.
Each module can act as a router to transfer packets through a link . The router handles its own packet transfers as well as packet transfers for other modules on the I2C bus. Outgoing packets from other modules first go to the router. The router sends these packets through the link to the host. Incoming packets go to the router, which then distributes them to the modules on the I2C bus. Multiple links can be established between different modules that share the same high-speed I2C bus. In other words, there can be multiple routers on the I2C network.
Packets and Protocol
Packets have a very lightweight structure. The structure is:
Packets are meant to be very small to fit within stringent RAM requirements of the possible module microcontrollers. This allows for very small and inexpensive controllers in the modules.
The heartbeat is something originated by each module to indicate basic status such as the link health. Heartbeats can be configured for each module to be internal (just showing module health) or external (indicating module health as well as link status).
The management of heartbeat packets (when used as a link status indicator) is largely automatic when using the aStem shared library. The console also contains a heartbeat indicator. These two indicators offer great assistance in trying to debug the status and operation of the link which can be tricky at first.
TEA stands for "Tiny Embedded Application". We have included a small kernel and virtual machine in the BrainStem modules to allow you to run several TEA programs concurrently. The TEA language is not meant to be a place to describe complex AI structures. Its main use is to perform small sequences of commands and logic. Moving simple and repetitive tasks to the Stem can simplify applications on a host computer. It can also decrease the amount of command packet traffic that must be transmitted through the link with the module(s).
Reflexes allow you to configure and manipulate automatic responses to various input changes within the BrainStem network. An example might be stopping the motors of a mobile robot when a bumper switch is pressed.
Reflexes can be configured to happen automatically with no intervention from the host. The host can then be later notified of the condition. This allows the host to be busy, say with AI, or perhaps not even reachable when the condition occurs but the appropriate action is still taken.
Since not all reflexes are applicable to all the states a robot may encounter, it is easy for the host to modify, disable, or redirect reflexive actions as the robot's states are changing.
BrainStem I2C Bus
Modules can communicate with on another using a built in high-speed and industry standard I2C bus. Packets are sent to other modules to initiate commands. Additionally, the BrainStem modules can communicated with other 3rd party peripherals such as LCD displays, EEPROM memory, controllers, and date chips.
Hosts have a variety of serial options and some require additional circuitry to communicate with the BrainStem Modules. The interface cable houses the appropriate circuitry and terminates at both ends with the correct connectors for each host.