Command Code:

cmdDIG_CFG = 26

The Packet:

0		1		2		3		4
address		3		cmdDIG_CFG		DigID		DIGCFG

DigID -	Index of digital IO pin.
DIGCFG -	[ (4) TMODE | (3) TSTATE | (2) TRG | (1) ENA | (0) IODIR ]

Description:

This command configures a digital IO pin.  A digital IO pin index that is out of range will generate an error message.  There is no reply packet.

If the command packet does not have a DIGCFG byte, the Stem will send a cmdDIG_CFG reply packet with the pin ID and current DIGCFG byte.

The DIGCFG byte has flags for the digital IO pin settings.  Setting the IODIR bit makes the digital IO pin an input.  Clearing the IODIR bit makes the digital IO pin an output.

At power-up all digital IO pins are configured as inputs.

Special Features of the GP 1.0 Module

For a digital input, setting the ENA bit enables polling of that input every 0.1ms.  If ENA is 1 and TRG is 1, the first transition from 0 to 1 on the pin will cause the module to issue a raw input.  If ENA is 1 and TRG is 0, the first transition from 1 to 0 on the pin will cause the module to issue a raw input.  After the first matching transition, the module will not detect any more transitions on that input.  This feature allows "debouncing" of switch input.  A digital input must be reset with the cmdDIG_RST command for the module to detect another transition.

The raw inputs for digital transitions on pins 0-4 correspond to input device IDs 15-19.

This command also configures the timer mode and target state if a digital IO pin is to be used as a logic event timer.  The cmdPTIME_RD command activates a logic event timer.  There are two timer modes: edge and width.  TSTATE is the target state bit.  The TMODE bit determines whether the pin is an edge or width timer.  Only pins 1-4 may be used as logic event timers.  If PinID is 0, the TMODE and TSTATE bits have no effect.

A TMODE bit of 0 makes the pin an edge timer.  Once started, the edge timer measures the elapsed time until a transition from the non-target state to the target state occurs on the specified digital input pin.  A TMODE bit of 1 makes the pin a pulse width timer.  Once started, the width timer waits for a transition from the non-target state to the target state on the specified digital input pin.  Then it measures the elapsed time until the pin returns to the non-target state.  The time for both modes is represented as a 2-byte value with 1.6us resolution.  The maximum time interval is 104ms.

At power-up all digital IO pins are configured as inputs with the TMODE, TSTATE, TRG, and ENA bits set to zero.